The input offset voltage of a differential amplifier is an important consideration when constructing a precision circuit. Ideally, the differential amplifier should provide a zero output voltage when the applied differential input voltage signal is zero. However, due to a number of reasons including inherent transistor mismatches in differential amplifiers, a zero differential input signal can produce a non-zero output signal without some form of input offset voltage cancellation to compensate for the internal offset error of the amplifier. The offset error is typically presented over the entire operating range of the amplifier. Traditional offset compensation techniques may involve chopping the input signal and filtering the output voltage in continuous time applications. Yet, these approaches typically work with a high frequency signal greater than the bandwidth of the amplifier to chop the input signal.
Another approach utilizes storing an input offset voltage across a capacitor coupled in series with the inverting input terminal of the differential amplifier to compensate the input signal for errors induced by the amplifier mismatches. During an auto-zeroing phase, switching circuits are closed to configure the differential amplifier as a unity gain buffer while a reference potential is applied through the series capacitor to the inverting input terminal, which appears at the output of the amplifier modified by the internal offset. The input offset voltage is thereby stored across the series capacitor. During the operational phase, the reference potential is replaced with the input signal where the input offset voltage stored across the capacitor is subtracted from the input signal and added back as the input signal propagates through the operational amplifier thereby cancelling the internal offset error. However, any error or leakage appearing on the series capacitor affects the input offset compensation. Unbalanced leakage may cause accumulation of differential voltage on the amplifier input terminals over time resulting in a circuit malfunction when offset compensation period becomes very long.
The auto-zeroing phase limits the continuous time operation of the amplifier in that the input signal must be disabled during the time the input offset voltage is stored across the series capacitor. Therefore, the method of storing the input offset voltage across the series capacitor is preferable for systems using sampling since it allows time for the auto-zeroing phase.
Thus, it is with respect to these considerations and others that the present invention has been made.